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The Future of Computing: Unlocking the Potential of Neuromorphic Technology for Low-Power and Secure Edge Computing. With the rise of self-driving vehicles, IoT, and Industry 4.0, the need for processing massive amounts of data locally and securely has never been greater. Traditional electronic computing systems have limitations such as high latency and low energy-efficiency, which are no longer suitable for these applications. Neuromorphic computing, a brain-inspired approach, is the solution to these problems.
However, current neuromorphic electrical computing systems have their own limitations, which is why the NEUROPULS project is developing next-generation low-power and secure edge-computing systems. By utilizing novel photonic computing architectures and security layers based on photonic PUFs, augmented silicon photonics CMOS-compatible platforms, and emerging non-volatile phase change materials, this project aims to demonstrate a two-order of magnitude improvement in energy efficiency. With RISC-V compliant interfaces and a novel full-system simulation platform, NEUROPULS will revolutionize the future of computing.
https://zenodo.org/records/12703949NEUROPULS will develop -for the first time- secure hardware accelerators based on novel neuromorphic architectures and PUF-based security layers leveraging the benefits offered by the integration of photonics, PCMs and III-V materials. This integration will provide superior security, energy-efficiency, and speeds for spiking and formal recurrent NNs when compared to current available technology for the selected use-cases.
This project has received funding from the European Union’s Horizon Europe research and innovation programme under grant agreement No 101070238 . This publication [communication] reflects the views only of the author, and the Commission cannot be held responsible for any use which may be made of the information contained therein.
NEUROPULS third Project General Assembly will be held on December 9 and 10 in Canazei, Italy. The assembly will be hosted by University of Verona (UNIVR), one of the project's partners to discuss the progress of the project and plan for future activities.
The fourth Project Progress Meeting will take place via videoconference on Friday, 5th of July from 3:00 P.M. to 4:00 P.M. to assess project overall progress, to discuss objectives, workplan, next face-to-face meeting, communication.
The second project general assembly of NEUROPULS will be held on March the 21st and 22nd in Barcelona, Spain. The assembly will be hosted by BSC (Barcelona Supercomputing Center), one of the project's partners to discuss the progress of the project and plan for future activities.
The third Project Progress Meeting will take place via videoconference on Friday, 1st of December from 3:00 P.M. to 4:00 P.M. to assess project overall progress, to discuss objectives, workplan, next face-to-face meeting, communication.
NEUROPULS has announced that its first project general assembly will be held on September 4 and 5 in Lisbon, Portugal. The assembly will be hosted by INESC-ID, one of the project's partners to discuss the progress of the project and plan for future activities.
The second Project Progress Meeting will take place via videoconference on Thursday, 6th of April from 3:00 P.M. to 4:00 P.M. to assess project overall progress, to discuss objectives, workplan, next face-to-face meeting, communication.
The first Project Progress Meeting will occur via videoconference on Thursday, 6th of April from 3:00 P.M. to 4:00 P.M. to assess project overall progress, to discuss objectives, workplan, next face-to-face meeting, communication.
The Kick-Off Meeting of NEUROPULS project will take place in Ecully (FR) on the 26th of January, 2023
Enabling Design Space Exploration of RISC-V Accelerator-rich Computing Systems on gem5
Silent Data Errors: Sources, Detection, and Modeling
Silent Data Corruptions: Microarchitectural Perspectives
Photonic Physical Unclonable Function Based on Symmetric Microring Resonator Arrays
Automated Black-box Testing of Mass Assignment Vulnerabilities in RESTful APIs
Estimating the Failures and Silent Errors Rates of CPUs Across ISAs and Microarchitectures
Security layers and related services within the Horizon Europe NEUROPULS project
Neuromorphic architectures based on augmented silicon photonics platforms
Phase-change materials for photonic applications
gem5-MARVEL: Microarchitecture-Level Resilience Analysis of Heterogeneous SoC Architectures
SimPoint-Based Microarchitectural Hotspot & Energy-Efficiency Analysis of RISC-V OoO CPUs
Silent Data Corruptions in Computing Systems: Early Predictions and Large-Scale Measurements
Harpocrates: Breaking the Silence of CPU Faults through Hardware-in-the-Loop Program Generation
Impact of Voltage Scaling on Soft Errors Susceptibility of Multicore Server CPUs
Lighting the way to better security - The NEUROPULS photonics-based approach
The Impact of Feature Representation on the Accuracy of Photonic Neural Networks
Complexity Assessment of Analog Security Primitives Using the Disentropy of Autocorrelation
D1.2 Data Management Plan
D5.9 System architecture model and simulation platform: iteration 1
D6.1 Metrics Definition
D7.10 Update to the exploitation plan: iteration 1
D7.1 Visual identity, project website and social network account
D7.2 Update to the dissemination and communication plan: iteration 1
NEUROPULS Project presentation A3 Poster
NEUROPULS Project presentation A5 Flyer
NEUROPULS Use cases A0 Scientific Poster